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A Signal Integrity Engineer’s Companion
Real-Time Test and Measurement and Design Simulation
Geoff Lawday
David Ireland
Greg Edlund
Foreword by Chris Edwards, Editor, IET Electronics Systems
and Software magazine
Prentice Hall Modern Semiconductor Design Series
Prentice Hall Signal Integrity Library
Use Real-World Test and Measurement Techniques to Systematically Eliminate Signal Integrity Problems
This is the industry’s most comprehensive, authoritative, and practical guide to modern Signal Integrity (SI) test and measurement for high-speed digital designs. Three of the field’s leading experts guide you through systematically detecting, observing, analyzing, and rectifying both modern logic signal defects and embedded system malfunctions. The authors cover the entire life cycle of embedded system design from specification and simulation onward, illuminating key techniques and concepts with easy-to-understand illustrations.
Writing for all electrical engineers, signal integrity engineers, and chip designers, the authors show how to use real-time test and measurement to address today’s increasingly difficult interoperability and compliance requirements. They also present detailed, start-to-finish case studies that walk you through commonly encountered design challenges, including ensuring that interfaces consistently operate with positive timing margins without incurring excessive cost; calculating total jitter budgets; and managing complex tradeoffs
in high-speed serial interface design.
Coverage includes
About the Authors: Dr. Geoff Lawday is Tektronix Professor in Measurement at Buckinghamshire New University, England. He delivers courses in signal integrity engineering and high performance bus systems at the University Tektronix laboratory, and presents signal integrity seminars throughout Europe on behalf of Tektronix. David Ireland, European and Asian design and manufacturing marketing manager for Tektronix, has more than 30 years of experience in test and measurement. He writes regularly on signal integrity for leading technical journals. Greg Edlund, Senior Engineer, IBM Global Engineering Solutions division, has participated in development and testing for ten high-performance computing platforms. He authored Timing Analysis and Simulation for Signal Integrity Engineers (Prentice Hall).
Download the color images for Chapter 6, 8, and 10
Download the simulation models (SPICE) for Chapter 2, 4, and 9 in a Windows Zip file
Download the simulation models (SPICE) for Chapter 2, 4, and 9 in a UNIX tarred and gzipped file
Introduction to a Signal Integrity Engineer's Companion
Foreword xv
Preface xix
Acknowledgments xxviii
About the Authors xxx
1 Introduction: An Engineer’s Companion 1
2 Chip-to-Chip Timing and Simulation 31
3 Signal Path Analysis as an Aid to Signal Integrity 87
4 DDR2 Case Study 117
5 Real-Time Measurements: Probing 159
6 Testing and Debugging: Oscilloscopes and Logic Analyzers 213
7 Replicating Real-World Signals with Signal Sources 255
8 Signal Analysis and Compliance 287
9 PCI Express Case Study 367
10 The Wireless Signal 399
Index 439