This chapter is from the book
This chapter is from the book
This chapter is from the book
1.6 A Look into the Future
Moore’s Law is likely to hold for quite some time to come. In a short amount of time from this writing, we will be able to design and fabricate in large quantities circuits with several hundred million transistors. We are already in the age of deep-submicron VLSI—the typical fabrication process constructs transistors that are much smaller than one micron in size. As we move toward even smaller transistors and even more transistors per chip, several types of challenges must be faced.
Interconnect
The first challenge is interconnect. In the early days of the VLSI era, wires were recognized to be important because they occupied valuable chip area, but properly-designed wiring did not pose a bottleneck to performance. Today, wires cannot be ignored—the delay through a wire can easily be longer than the delay through the gate driving it. And because the parasitic components of wires are so significant, crosstalk between signals on wires can cause major problems as well. Proper design methodologies and careful analysis are keys to taming the problems introduced by interconnect.
Another challenge is power consumption. Power consumption is a concern on every large chip because of the large amount of activity generated by so many transistors. Excessive power consumption can make a chip so hot that it becomes unreliable. Careful analysis of power consumption at all stages of design is essential for keeping power consumption within acceptable limits.
Reliability
As we move into nanometer-scale VLSI, transistors become less reliable. Traditionally, we have relied on manufacturing to deliver enough perfect components. (There are some exceptions—for example, memories have used spare cells for quite some time.) However, both permanent and transient failures are becoming frequent enough that we must design VLSI systems that can tolerate imperfection. We must apply reliability techniques at all levels of abstraction—circuit, logic, and architecture—if we are to cost-effectively manage the transition to nanometer-scale technology.
Complexity
And we must certainly face the challenge of design complexity as we start to be able to create complete systems-on-silicon. In about ten years, we will be able to fabricate chips with a billion transistors—a huge design task at all levels of abstraction, ranging from layout and circuit to architecture. Over the long run, VLSI designers will have to become even more skilled at programming as some fraction of the system is implemented as on-chip software. We will look at systems-on-chips in more detail in Chapter 8.