CompTIA A+ Exam Prep: Microprocessors

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Intel Microprocessors

There were originally several competitors in the PC-compatible microprocessor market. However, over time the market has narrowed to two major players competing for market domination—Intel and American Micro Devices (AMD). Intel has set the standard for processor performance throughout most of the personal computer era. However, AMD has shown itself a worthy opponent, frequently taking the market lead with speed increases and new innovations.

For the most part, the previous generations of microprocessors have disappeared from the marketplace, leaving the Pentium and its clones as the only processor types that need to be discussed in detail. The following sections first look at the advancements Intel has produced and then focus on the AMD processors that compete with them.

The Pentium Processor

When IBM was designing the first PC, it chose the Intel 8088 microprocessor and its supporting chipset as the standard CPU for its design. This was a natural decision because one of IBM's major competitors (Apple) was using Motorola microprocessors for its designs. The choice to use the Intel microprocessor still impacts the design of PC-compatible systems. In fact, the microprocessors used in the vast majority of all PC-compatible microcomputers include the Intel 8088/86, 80286, 80386, 80486, and Pentium (80586 and 80686) devices.

This original Pentium architecture has appeared in three generations. The first generation, code named the P5, came in a 273-pin PGA package and operated at 60 or 66MHz speeds. It used a single +5V (DC) operating voltage, which caused it to consume a large amount of power and generate a large amount of heat. It generated so much heat during normal operation that an additional CPU cooling fan was required.

The second generation of Pentiums, referred to as P54Cs, came in a 296-pin Staggered Pin Grid Array (SPGA) package and operated at 75, 90, 100, 120, 133, 150, and 166MHz in different versions. For these devices, Intel reduced the power-supply voltage level to +3.3V (DC) to consume less power and provide faster operating speeds. Reducing the power-supply level in effect moved the processor's high- and low-logic levels closer together, which means that less time is required to switch back and forth between them. The SPGA packaging made the second generation of Pentium devices incompatible with the first-generation system boards.

The second-generation devices also employed internal clock multipliers to increase performance. In this scenario, the clock signal introduced to the microprocessor is the same one that drives the system's buses; however, the internal clock multiplier causes the microprocessor to operate internally at some multiple of the external clock speed (for example, a Pentium operating from a 50MHz external clock and using a 2x internal multiplier is actually running internally at 100MHz).

The third generation of Pentium designs, designated as P55C, employed a 296-pin SPGA arrangement. This package adhered to the 321-pin Socket-7 specification designed by Intel. The P55C was produced in versions that operate at 166, 180, 200, and 233MHz. This generation of Pentium devices operated at voltages below the +3.3V level established in the second generation of devices. The P55C was known as the Pentium MMX (Multimedia Extension) processor. Figure 3.1 shows the pin arrangements for PGA and SPGA devices. Notice the uniformity of the PGA rows and columns versus the staggered rows and columns of the SPGA device.

Intel Cache Structures

One method of increasing the memory-access speed of a computer is called caching. This memory management method assumes that most memory accesses are made within a limited block of addresses. Therefore, if the contents of these addresses are relocated into a special section of high-speed SRAM, the microprocessor could access these locations without requiring any wait states.

The original Intel Pentium had a built-in first-level cache that could be used for both instructions and data. The internal cache was divided into four 2KB blocks containing 128 sets of 16-byte lines each. Control of this cache is handled directly by the microprocessor. The microprocessor's internal first-level cache is also known as an L1 cache. Many of the older Pentium system boards extended the caching capability of the microprocessor by adding an external, second-level 256KB/512KB memory cache. The second-level cache became known as an L2 cache.

With the Pentium Pro, Intel moved the 256KB or 512KB L2 cache from the system board to the processor package. This design technique continued through the Pentium II and III slot processors so that the 256KB/512KB L2 cache resided in the microprocessor cartridge.

In later CPUs, such as the Celeron, Intel moved the L2 cache (128KB/256KB and 256KB/512KB, respectively) onto the actual microprocessor die. Moving the L2 cache onto the die made the microprocessor directly responsible for managing the L2 cache and enabled it to run at full speed with the microprocessor. In all these systems, no cache existed on the system board.

When Intel designed the Itanium processor, it built in capabilities for managing an additional external level of cache in the microprocessor cartridge. This additional cache level was dubbed L3 cache. Later versions of the Itanium microprocessors can support up to 12MB of cache in the cartridge.

The Xeon processor has continued this design concept and improved it by moving a 1MB or 2MB L3 cache onto the microprocessor die. Again, the external cache is able to run at full speed with the microprocessor. The computer industry has taken a more liberal definition of L3 cache; it sometimes refers to L3 cache as cache memory mounted on system boards with processors that possess onboard L1 and L2 cache.

Advanced Pentium Architectures

Intel has continued to improve its Pentium line of microprocessors by introducing additional specifications, including the Pentium MMX, Pentium Pro, Pentium II, Pentium III, and Pentium 4 processors. At the same time, Intel's competitors have developed clone designs that equal or surpass the capabilities of the Intel versions.

Pentium MMX Processors

The Pentium MMX processor extended the multimedia and communications processing capabilities of the original Pentium device by the addition of 57 multimedia-specific instructions to the instruction set. Intel also increased the onboard L1 cache size to 32KB. The cache was divided into two separate 16KB caches: the instruction cache and the data cache. The typical L2 cache used with the MMX is 256KB or 512KB and employs a 66MHz system bus.

The Pentium MMX processor was produced in 166, 200, and 233MHz versions and used a 321-pin SPGA Socket-7 format. It required two separate operating voltages. One source was used to drive the Pentium processor core; the other was used to power the processor's I/O pins.

Pentium Pro Processors

Intel departed from simply increasing the speed of its Pentium processor line by introducing the Pentium Pro processor. Although compatible with all the software previously written for the Intel processor line, the Pentium Pro was optimized to run 32-bit software. However, the Pentium Pro did not remain pin-compatible with the previous Pentium processors. Instead, Intel adopted a 2.46 inchx2.66 inch, 387-pin PGA configuration to house the Pentium Pro processor core, and an onboard 256KB (or 512KB) L2 cache with a 60 or 66MHz system bus.

The L2 cache complements the 16KB L1 cache in the Pentium core. Figure 3.2 illustrates this arrangement. Notice that although the L2 cache and the CPU are on the same PGA device, they are not integrated into the same IC. The unit is covered with a gold-plated copper/tungsten heat spreader.

The L2 onboard cache stores the most frequently used data not found in the processor's internal L1 cache as close to the processor core as it can be without being integrated directly into the IC. A high-bandwidth cache bus (referred to as the backside bus) connects the processor and L2 cache unit.

The Pentium Pro was designed to be used in single-microprocessor applications as well as in multiprocessor environments such as high-speed, high-volume file servers and workstations. Several dual-processor system boards have been designed for twin Pentium Pro processors. These boards, like the one shown in Figure 3.3, are created with two Pentium Pro sockets so that they can operate with either a single processor or with dual processors.

Pentium II Processors

Intel radically changed the form factor of the Pentium processors by housing the Pentium II processor in a new Single-Edge Contact Cartridge (SECC), as shown in Figure 3.4. This cartridge uses a special retention mechanism premounted to the system board to hold the device in place.

The proprietary 242-contact socket design is referred to as the Slot 1 specification and was designed to enable the microprocessor to operate at bus speeds in excess of 300MHz.

The cartridge also requires a special Fan Heat Sink (FHS) module. Like the SEC cartridge, the FHS module requires special support mechanisms to hold it in place. The fan draws power from a special power connector on the system board or from one of the system's auxiliary power connectors.

Inside the cartridge is a substrate material on which the processor and related components are mounted. The components consist of the Pentium II processor core, a tag RAM, and an L2 burst SRAM. Tag RAM is used to track the attributes (read, modified, original location in RAM, and so on) of data stored in the cache memory.

The Pentium II includes all the multimedia enhancements from the MMX processor, as well as retaining the power of the Pentium Pro's dynamic execution, and features up to 512KB of L2 cache and employs a 66 or 100MHz system bus. The L1 cache is increased to 32KB, and the L2 cache operates with a half-speed bus. Figure 3.5 shows the content of the Pentium II cartridge.

A second cartridge type, called the Single-Edged Processor Package (SEPP), was developed for use with the Slot 1 design. In this design, the boxed processor is not completely covered by the plastic housing as it is in the SEC design. Instead, the SEPP circuit board is accessible from the backside.

Intel followed the Pentium II processor with an improved low-cost design it called the Pentium Celeron. The first version of this line of processors was built around a Pentium II core without a built-in cache. Later, Celeron versions featured a 66MHz bus speed and only 128KB of L2 cache. Initially, these versions were packaged in the SEC cartridge.

Pentium III Processors

Intel quickly followed the Celeron release with a new Slot 1-compatible design it called the Pentium III. The original Pentium III processor (code named Katmai) was designed around the Pentium II core but increased the L2 cache size to 512KB. It also increased the speed of the processor to 600MHz, including a 100MHz front-side bus (FSB) speed.

Later versions of the Pentium III and Celeron processors were developed for the Intel Socket 370 specification. This design returned to a 370-pin, ZIF socket/SPGA package arrangement, as shown in Figure 3.6.

The first pin grid array versions of the Pentium III and Celeron processors conformed to a standard called the Plastic Pin Grid Array (PPGA) 370 specification. Intel repackaged its processors into a PGA package to fit this specification. The PPGA design was introduced to produce inexpensive, moderate-performance Pentium systems. The design topped out at 533MHz with a 66MHz bus speed.

Intel upgraded the Socket 370 specification by introducing a variation called the Flip Chip Pin Grid Array (FC-PGA) 370 design. Intel made small modifications to the wiring of the socket to accommodate the Pentium III processor design. In addition, it employed a new 0.18 micron IC manufacturing technology to produce faster processor speeds (up to 1.12GHz) and front-side bus speeds (100MHz and 133MHz). However, the new design provided only 256KB of L2 cache. Further developments of the Pentium III employed 0.13 micron IC technology to achieve 1.4GHz operating speeds with increased cache sizes (256KB or 512KB).

Xeon Processors

Intel has produced three special versions of the Pentium III that they have collectively named the Pentium Xeon, as shown in Figure 3.7. These processors are designed to work with an edge connector-based Slot 2 specification that Intel has produced to extend its Slot 1/boxed-processor scheme to a 330-contact design. Each version features a different level of L2 cache (512KB, 1MB, 2MB).

The Xeon designs were produced to fill different high-end server needs. The Xeon processor functions at speeds up to 866MHz and is built on the 0.18-micron process technology. The processor allows for highly scalable server solutions that support up to 32 processors.

Pentium 4 Processors

Intel then released the Pentium 4 (Williamette 423) microprocessor. The Pentium 4 was a new processor design based on 0.18-micron IC construction technology. It employed a modified Socket 370 PGA design that uses 423 pins and boasts operating speeds up to 2GHz.

The system's FSB was increased from 64 to 128 bits and operates at up to 400MHz. The bus is actually clocked at 100MHz, but data is transferred four times in a single clock cycle (referred to as a quad-pumped bus). Therefore, the transfer rate of the bus is considered to be 400MT/s. With a width of 128 bits, this provides the FSB with a theoretical bandwidth of 6400MBps.

In addition to the new front-side bus size, the Pentium 4 features WPNI (Williamette Processor New Instructions) in its instruction set. The L1 cache size has been reduced from 16KB in the Pentium III to 8KB for the Pentium 4. The L2 cache is 256KB and can handle transfers on every clock cycle.

The operating voltage level for the Pentium 4 core is 1.7Vdc. To dissipate the 55 watts of power (heat) that the microprocessor generates at 1.5GHz, the case incorporates a metal cap that acts as a built-in heat sink.

Newer .13-micron versions operate at speeds up to 3.06GHz. This newer Pentium 4 design employs an improved 478-pin version of the chip that increased the L2 cache size to 512KB. This type of Pentium 4 processor has been produced in versions that run at 2.0, 2.2, 2.4, 2.8, and 3.06GHz. The 2.4GHz version increased the speed of the quad pumped bus to 533MHz (133x4). Some variations of the 2.4 to 3.06 processors were produced with support for 800MHz FSB operations.

The evolution of the Pentium 4 processor topped out with the delivery of a 3.2 and 3.4GHz version in 2004. The 3.06MHz version of the Pentium 4 brought hyperthreading technology (HTT) to the Intel line of processors. Hyperthreading is an architecture that enables multiple program threads to be run in different sections of the processor simultaneously. Basically, the structure fools the operating system into thinking that two processors are available.

The most advanced versions of the Pentium 4 processor are the Pentium 4 Extreme Editions (P4EE). In its ongoing battle with AMD for microprocessor supremacy, Intel added 2MB of Level 3 (L3) cache to the Xeon core and called them P4EE. Later versions of these processors have been clocked at 3.73GHz and are equipped with 1066MHz front-side buses. They are available in either Socket 603 or LGA 775 versions.

L3 cache is cache memory placed between the L2 cache and main memory. This level of cache typically provides a higher hit rate than L2 cache (because of being larger in size) but requires a longer access time to retrieve data. These memory caches can be implemented on the system board, or as in the case of the PE4EE processors, on the microprocessor die.

Itanium Processors

The Intel Itanium processor, as shown in Figure 3.8, provides a new architecture specifically for servers. It maximizes server performance through special processing techniques Intel refers to as Explicitly Parallel Instruction Computing (EPIC).

The Itanium processor design features a three-level, onboard cache system. The L1 cache size is 32KB operating fully pipelined, the L2 cache size ranges up to 256KB, and the new L3 cache is available in sizes ranging from 2 or 4MB to 12MB. The cartridge's connector specification provides separate voltage levels for the processor and cache devices to improve signal integrity.

Itanium processors are designed to be available 100 percent of the time. Therefore, they tend to be very expensive—often more expensive than the complete network operating system that they are running. However, the cost of the processor is nothing compared to the cost of most online businesses going down for just one hour.

Intel Dual-Core Processors

Dual-core processors provide two execution cores in one physical processor package. The two cores are actually produced on the same piece of silicon (on the same die). This enables the system to divide processing tasks between the two cores. Fitting two processors into a single package theoretically doubles the computing power of the device without having to clock it twice as fast. Figure 3.9 shows a dual-core processor arrangement.

Intel has launched the Pentium D and Pentium Extreme Edition (EE) lines of dual-core processors. The Extreme Edition versions employ Intel's hyperthreading technology that enables a single processor core to simulate the operation of two different logical processors that can be used to work on different program segments simultaneously. Including the hyperthreading technology in a dual-core processor package enables it to process four threads simultaneously (it functions like four single-core processors). Table 3.1 lists the key characteristics of the Intel dual-core processors.

Table 3.1. Intel Dual-Core Processors

Processor	Clock Frequency	L2-Cache	Front Side Bus Speed	Clock Multiple	Core Voltage	Power Dissipation
Pentium D 805	2.667GHz	2 x 1MB	533MT/s	20x	1.25/1.4V	95W
Pentium D 820	2.800GHz	2 x 1MB	800MT/s	14x	1.2/1.4V	95W
Pentium D 830	3GHz	2 x 1MB	800MT/s	15x	1.2/1.4V	130W
Pentium D 840	3.2GHz	2 x 1MB	800MT/s	16x	1.2/1.4V	130W
Pentium D 920	2.8GHz	2 x 2MB	800MT/s	14x	1.2/1.337V	130W
Pentium D 930	3GHz	2 x 2MB	800MT/s	15x	1.2/1.337V	130W
Pentium D 940	3.2GHz	2 x 2MB	800MT/s	16x	1.2/1.337V	130W
Pentium D 950	3.4GHz	2 x 2MB	800MT/s	17x	1.2/1.337V	130W
Pentium D 960	3.6GHz	2 x 2MB	800MT/s	18x	1.2/1.337V	130W
Pentium Extreme Edition 840	3.2GHz	2 x 1MB	800MT/s	16x	1.2/1.4V	130W
Pentium Extreme Edition 955	3.466GHz	2 x 2MB	1066MT/s	13x	1.2/1.337V	130W
Pentium Extreme Edition 965	3.733GHz	2 x 2MB	1066MT/s	14x	1.2/1.337V	130W

As Table 3.1 shows, most of the dual-core Intel designs employ an 800MHz FSB to communicate with the rest of the system. So far, the exceptions to this are the Pentium EE 955 and EE 965 processors that use a 1066MHz FSB.

The two cores communicate with each other through a special bus interface block or through the FSB. Most of the dual-core Intel designs employ an 800MHz or 1066MHz FSB to communicate with the rest of the system. The two cores can also access each other's L2 caches through this interface. However, each core can only use half of the FSB bandwidth frequency when working under heavy load. Some models include 1MB of L2 cache for each core, whereas other models have enlarged the L2 cache to 2MB for each core.

All the current and planned dual-core processors from Intel are designed to use a new type of socket called the Land Grid Array (LGA) 775. Unlike previous socket types, the LGA775, also referred to as Socket-T, places contact pins on the system board and contact pads on the bottom of the microprocessor.

A hinged metal rim folds down over the microprocessor package and holds its contact pads securely against the signal pins on the system board. A locking arm is used to clamp the processor package in place. The heat sink and fan unit are connected directly and securely to the system board on four points. Figure 3.10 shows the LGA775 socket arrangement.

Advanced Intel Microprocessor Technologies

All Intel dual-core processor types incorporate advanced technologies into their feature sets. Some of these processors support the Intel Execute Disable Bit virus protection (XD bit), EM64T 64-bit extension, and enhanced SpeedStep technologies. Other designs also include Virtualization Technology (VT), which enables a single machine to run multiple operating systems at once.

XD-bit technology is used to separate areas of memory into regions for distinct uses. For example, a section of memory can be set aside exclusively for storing processor instructions (code), and another section can be marked only for storage of data.

In the case of Intel processors, any section of memory marked with the XD attribute means it's only for storing data. Therefore, processor instructions cannot be stored there. This is a popular technique for preventing malicious software from taking over computers by inserting their code into another program's data storage area and then running that code from within this section. This is known as a buffer overflow attack.

EM64T is a 64-bit microprocessor architecture and corresponding instruction set that is an extension of the x86 instruction set used with all Intel processors. Intel has included this technology and extended instruction set in its Pentium 4, Pentium D, Pentium Extreme Edition, Celeron D, and Xeon processors.

Enhanced Intel SpeedStep Technology (EIST) enables the operating system software to dynamically control the clock speed of a processor. Running the processor at higher clock speeds provides better performance. However, running the processor at a lower speed provides for reduced power consumption and heat dissipation. This throttling technique is used to conserve battery power in notebooks, extend processor life, and reduce noise from cooling devices.

Each processor type has a range of core operating speeds at which it can work. For example, a Pentium M processor designated as a 1.5GHz processor can actually operate safely at any speed between 600MHz and 1.5GHz. The Intel dual-core designs leave some margin for processor overclocking to satisfy the PC performance enthusiast. Overclocking is the practice of manually configuring the microprocessor clock to run at a higher speed than the IC manufacturer suggests, in order to squeeze additional performance out of the system.

The SpeedStep technology enables the user or the operating system to change the speed setting in 200MHz increments. Windows operating systems prior to Windows XP require a special driver and a dashboard application to provide speed control for the processor. However, Windows XP has speed step support built in to its Control Panel's Power Management Console.

Hyperthreading Software Support

The presence of two microprocessors does not automatically double system performance. The controlling operating system software must distribute tasks to all available processor resources. This requires the OS to handle multiple program execution threads that can run independently. The problem is that software has not traditionally been written with multiple threading capabilities. Most existing software applications are single threaded—they are written so only one task is worked on at a time. In these cases, the dual-core processor performs just like its single-core version.

On the other hand, modern operating systems can deliver multitasking operation—operations where the system works on more than one application at a time. The operating system switches from one task to another in a predetermined order. This is done so quickly that the system appears to be working on multiple tasks at the same time. Operating systems can use processors with hyperthreading technology to provide smooth and responsive operations during intensive multitasking operations.